Netlist, Inc. v. Micron Technology, Inc.

Netlist, Inc. v. Micron Technology, Inc. The Federal Circuit affirmed, holding that substantial evidence supported the Board's findings that Ellsberry taught enabling buffer data paths in accordance with a latency parameter and enabling data paths through the claimed buffer. The court also rejected Netlist's APA challenges, including one inadequately developed argument. The decision reinforces that the Board may rely on expert testimony and the prior art's standards-based disclosures to support obviousness findings, and that APA attacks need specific, developed challenges to the Board's reasoning. Affirmed; costs against Netlist. The disputed limitations required a byte-wise buffer data path enabled during a first time period in accordance with a latency parameter, and tristate buffers enabled to drive write data to module data lines. Substantial evidence supported the Board's finding that Ellsberry's switch ASICs used Posted CAS latency/additive latency information to control timing, including disclosures that the parameter was stored in the switch ASIC and JEDEC-compatible latency evidence. Although Netlist argued the Board improperly used Netlist's own '537 patent as an unpetitioned reference, the Federal Circuit found any potential error harmless because the Board alternatively relied on Ellsberry itself and expert testimony. The court upheld the Board's finding that Ellsberry taught enabling data paths through switch ASIC ports, and alternatively that Ellsberry combined with Halbert's tristate-buffer teachings supplied the limitation. Netlist's broad APA challenge to the Board's treatment of most claim limitations was not adequately developed; its more specific APA challenge for dependent claims 7, 16, and 21 failed because the court could discern the Board's reasoning. § 103 waiver / forfeiture precedential § 103 waiver / forfeiture precedential § 103 waiver / forfeiture precedential